[Avila] IXP4xx watchdog reset hang

loft loft at nc.rr.com
Wed Mar 8 11:45:15 EST 2006


David Holmer wrote:

David,

I don't know for sure that this is your problem, however we experienced,
hunted and fixed this on the nslu2-linux effort. I'm also seeing it
occasionally on a new Cirrus 93xx platform.  We saw this problem with
the shutdown -r, where we knew the board was rebooting, but Redbot never
ran.

Cheers,

Tom

>I've been working on getting the IXP4xx built in watchdog time operational
>on our Avila boards. I've had partial success using the driver that comes in
>the 2.6 kernel with the 0.6 release. The problem is that although the kernel
>driver seems to setup the watchdog correctly, and the watchdog triggers a
>reset at the right time (when it stops getting updates), the Avila board
>only seems to reboot successfully some of the time. Often the board will
>hang after the watchdog reset and I see no output on the serial port (i.e.
>Redboot isn't coming up). Sometimes the watchdog works perfectly and the
>system reboots normally.
>
>I did more investigation into the topic and I suspect I found the culprit.
>It seems that the IXP4xx watchdog only triggers a local cpu-reset. The issue
>seems to be if the flash isn't in read mode (e.g. write or erase modes) when
>the watchdog triggers, then the cpu can't load the bootloader out of the
>flash. Since we're using a JFFS2 file system, the flash could be in these
>other states at any time.
>
>I found an Intel Application Note that seemed to have useful information:
>"Intel StrataFlashR Memory to IntelR IXP42x Product Line of Network
>Processors and IXC1100 Control Plane Processor Design Guide, Application
>Note 785" at http://download.intel.com/design/flcomp/applnots/25378604.pdf
>In section 4.5 "Reset Consideration" this app note seems to describe the
>issues I'm experiencing and says that when interfacing StrataFlash with an
>IXP42x the  PLL_LOCK pin on the IXP42x should by tied with some pulse width
>extension circuitry to the RP# pin on the StrataFlash. 
>
>Do the Avila boards have this reset connection that Intel describes in the
>App Note? If not is this something that is difficult to add to the PCB? Are
>other people using the watchdog and experiencing this issue as well?
>
>- David Holmer
>
>
>---------------------------------------------------------------------
>To unsubscribe, e-mail: avila-unsubscribe at lists.unixstudios.net
>For additional commands, e-mail: avila-help at lists.unixstudios.net
>
>  
>





More information about the Avila mailing list